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/*
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This file is part of CanFestival, a library implementing CanOpen Stack.
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Copyright (C): Edouard TISSERANT and Francis DUPIN
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AVR Port: Andreas GLAUSER and Peter CHRISTEN
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See COPYING file for copyrights details.
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This library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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This library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with this library; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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/******************************************************************************
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Project description:
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Test projekt for a DS 401 slave, running on Atmel's STK500 with AT90CAN128
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Short description:
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PORTA: Inputs (Keys, low active)
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PORTB: Outputs (LEDs, low active)
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PORTC: Node ID (1 BCD switch)
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******************************************************************************/
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#include "hardware.h"
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#include "canfestival.h"
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#include "can_AVR.h"
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#include "objdict.h"
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unsigned char timer_interrupt = 0; // Set if timer interrupt eclapsed
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unsigned char inputs;
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// CAN
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unsigned char nodeID;
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static Message m = Message_Initializer; // contain a CAN message
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static unsigned char old_input_value; // Inputs, to check if a input has changed
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void sys_init();
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// macros to handle the schedule timer
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#define sys_timer timer_interrupt
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#define reset_sys_timer() timer_interrupt = 0
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#define CYCLE_TIME 1000 // Sample Timebase [us]
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int main(void)
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{
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sys_init(); // Initialize system
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canInit(CAN_BAUDRATE); // Initialize the CANopen bus
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initTimer(); // Start timer for the CANopen stack
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nodeID = read_bcd(); // Read node ID first
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setNodeId (&ObjDict_Data, nodeID);
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setState(&ObjDict_Data, Initialisation); // Init the state
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PDOInit(&ObjDict_Data);
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// Examples for callbacks
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// RegisterSetODentryCallBack(d, 0x1005, 0, &OnCOB_ID_SyncUpdate);
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// errorCode = setODentry(d, d->transfers[line].index, d->transfers[line].subIndex,
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// (void *) d->transfers[line].data, &size, 1);
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for(;;) // forever loop
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{
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if (sys_timer) // Cycle timer, invoke action on every time slice
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{
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reset_sys_timer(); // Reset timer
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// Read the input states from the ports
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Read_Inputs_8_Bit[0] = get_inputs();
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// Send the new input state if there was a change
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if (old_input_value != Read_Inputs_8_Bit[0])
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{
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old_input_value = Read_Inputs_8_Bit[0];
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if (getState(&ObjDict_Data) == Operational)
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sendPDOevent(&ObjDict_Data);
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}
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set_outputs(Write_Outputs_8_Bit[0]);
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// Check if CAN address has been changed
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if(!( nodeID == read_bcd()))
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{
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nodeID = read_bcd(); // Save the new CAN adress
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setState(&ObjDict_Data, Stopped); // Stop the node, to change the node ID
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setNodeId(&ObjDict_Data, nodeID); // Now the CAN adress is changed
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setState(&ObjDict_Data, Pre_operational); // Set to Pre_operational, master must boot it again
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}
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}
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// Handle all MOB's at once, if a message was received pass it to the CANstack
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if (canReceive(&m)) // a message reveived
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canDispatch(&ObjDict_Data, &m); // process it
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else
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{
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// Enter sleep mode
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#ifdef WD_SLEEP // Watchdog and Sleep
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wdt_reset();
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sleep_enable();
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sleep_cpu();
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#endif // Watchdog and Sleep
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}
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}
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}
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void sys_init()
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/******************************************************************************
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Initialize the relays, the main states and the modbus protocol stack.
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INPUT LOCK_STATES *lock_states
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OUTPUT void
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******************************************************************************/
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{
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OSCCAL = 0x43;
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PORTA = 0xFF; // Inputs (Keys, low active) with pullup
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DDRA = 0x00; //
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PORTB = 0xFF; // Outputs (LEDs, low active) all 1
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DDRB = 0xFF; //
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PORTC = 0xFF; // 1 BCD switch with pullup
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DDRC = 0x00; //
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PORTD = 0x2C; // 2xCOM, unused, CAN, unused
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DDRD = 0x2A; // All init 0 or without pullup
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PORTE = 0x00; // Output
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DDRE = 0x3C; // 2x not used, 2x not used
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PORTF = 0x00; // Not used
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DDRF = 0xFF; // All output
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PORTG = 0x00; // Not used
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DDRG = 0x1F; // Output for debug (only 5 pins)
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// Set timer 0 for main schedule time
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TCCR0A |= 1 << WGM01 | 1 << CS01 | 1 << CS00;// Timer 0 CTC , Timer 0 mit CK/64 starten
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TIMSK0 = 1 << OCIE0A; // Timer Interrupts: Timer 0 Compare
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OCR0A = (unsigned char)(F_CPU / 64 * CYCLE_TIME/1000000 - 1); // Reloadvalue for timer 0
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#ifdef WD_SLEEP // Watchdog and Sleep
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wdt_reset();
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wdt_enable(WDTO_15MS); // Watchdogtimer start with 16 ms timeout
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#endif // Watchdog and Sleep
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sei(); // Enable Interrupts
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}
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#ifdef __IAR_SYSTEMS_ICC__
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#pragma type_attribute = __interrupt
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#pragma vector=TIMER0_COMP_vect
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void TIMER0_COMP_interrupt(void)
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#else // GCC
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ISR(TIMER0_COMP_vect)
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#endif // GCC
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/******************************************************************************
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Interruptserviceroutine Timer 2 Compare A for the main cycle
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******************************************************************************/
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{
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timer_interrupt = 1; // Set flag
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}
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